Data Processing and Memory Operations ​
Complete Lab Manual
For the complete experiment including learning objectives, theoretical background, and detailed explanations, download the PDF manual: Download Experiment 2 PDF
Examples ​
Example 1: Data Processing Instructions ​
This example demonstrates various arithmetic and bitwise operations on registers.
asm
AREA RESET, CODE, READONLY
EXPORT __Vectors
__Vectors
DCD 0x20001000
DCD Reset_Handler
ALIGN
AREA MYCODE, CODE, READONLY
ENTRY
EXPORT Reset_Handler
Reset_Handler
; Load values from memory into registers
LDR R1, NUM1 ; R1 = 50
LDR R2, NUM2 ; R2 = 12
; Arithmetic operations
ADD R3, R1, R2 ; R3 = 50 + 12 = 62
SUB R3, R3, #4 ; R3 = 62 - 4 = 58
MUL R4, R3, R2 ; R4 = 58 * 12 = 696
; Logical operations
AND R5, R4, #0xFF ; R5 = 696 & 0xFF = 0xB8 (184)
ORR R5, R5, #0x01 ; R5 = 0xB8 | 0x01 = 0xB9 (185)
BIC R5, R5, #0x08 ; R5 = 0xB9 & ~0x08 = 0xB1 (177)
EOR R5, R5, #0x02 ; R5 = 0xB1 ^ 0x02 = 0xB3 (179)
; Shift and Barrel Shifter
LSL R8, R4, #4 ; logical left shift by 4 bits
LSR R9, R4, #8 ; logical right shift by 8 bits
ADD R5, R5, R5, LSL #1 ; R5 = R5 + (R5 << 1) = 3 * R5
; Store result in memory using a pointer
LDR R6, RP ; R6 = address of RESULT
STR R5, [R6] ; RESULT = R5
; Read back for verification
LDR R7, [R6] ; R7 = RESULT
STOP B STOP
AREA CONSTANTS, DATA, READONLY
NUM1 DCD 50 ; First integer
NUM2 DCD 12 ; Second integer
RP DCD RESULT ; Pointer to RESULT variable
AREA MYDATA, DATA, READWRITE
RESULT DCD 0 ; Will hold the final computed value
ENDExample 2: Load/Store with Different Addressing Modes ​
This example demonstrates load and store instructions using various addressing modes.
asm
AREA RESET, CODE, READONLY
EXPORT __Vectors
__Vectors
DCD 0x20001000 ; Initial SP (example)
DCD Reset_Handler ; Reset vector
AREA MYCODE, CODE, READONLY
ENTRY
EXPORT Reset_Handler
Reset_Handler
LDR R0, =ARRAY ; R0 = &ARRAY (base address)
; 1) Immediate Offset: EA = R0 + #8 (third element)
; ---------------------------------------------------------
LDR R1, [R0, #8] ; R1 = ARRAY[2] = ? (expect 30)
LDR R7, =OUT
STR R1, [R7, #0] ; OUT[0] = R1
; 2) Pre-indexed: R2 = [R2 + #4], then R2 = R2 + #4
; Use a scratch pointer so R0 remains the base.
; ---------------------------------------------------------
MOV R2, R0 ; R2 = &ARRAY
LDR R3, [R2, #4]! ; R2 -> &ARRAY[1], R3 = ARRAY[1] = ? (expect 20)
STR R3, [R7, #4] ; OUT[1] = R3
; After this, R2 now points at ARRAY[1].
; 3) Post-indexed: R4 = [R4], then R4 = R4 + #12
; Load first element, then advance pointer to the 4th.
; ---------------------------------------------------------
MOV R4, R0 ; R4 = &ARRAY
LDR R5, [R4], #12 ; R5 = ARRAY[0] = ? (expect 10), R4 -> &ARRAY[3]
STR R5, [R7, #8] ; OUT[2] = R5
; 4) Register Offset: EA = R0 + R6
; Offset register holds byte offset (multiple of 4 for words).
; ---------------------------------------------------------
MOV R6, #12 ; byte offset to ARRAY[3]
LDR R8, [R0, R6] ; R8 = ARRAY[3] = ? (expect 40)
STR R8, [R7, #12] ; OUT[3] = R8
; read second element via register offset
MOV R6, #4 ; byte offset to ARRAY[1]
LDR R9, [R0, R6] ; R9 = ARRAY[1] = ? (expect 20)
STOP B STOP
AREA CONSTS, DATA, READONLY
ARRAY DCD 10, 20, 30, 40 ; four words at consecutive addresses
AREA MYDATA, DATA, READWRITE
OUT DCD 0, 0, 0, 0 ; capture buffer for observed loads.
ENDTasks ​
Task 1: Bitwise Register Manipulation ​
Start with R0 = 0x12345678. Perform the following operations and observe the results in the debugger:
- Clear bits 4--7 (second hex nibble).
- Set bits 8--11 (force nibble to
F). - Toggle bits 28--31 (highest nibble).
Hint: Use BIC, ORR, and EOR with appropriate masks.
Task 2: Addressing Modes with an Array ​
Given the following array:
asm
ARRAY DCD 0x11, 0x22, 0x33, 0x44
OUT SPACE 16Load each element using a different addressing mode, then store to OUT:
- 0x11 via immediate offset
- 0x22 via pre-indexed
- 0x33 via post-indexed (load first, then increment pointer)
- 0x44 via register offset
Hint: Put ARRAY's base in R1 (e.g., LDR R1, =ARRAY). Verify OUT in memory after execution.